Hi Everybody,
I am currently trying to implement a carry save adder tree (like a Wallace tree) in verilog but I am really confused about the addition arithmetic of carry save adder trees (I understand how a single carry save adder works). I was looking at an example on p.33 of this ducument http://www.ee.ic.ac.uk/hp/staff/dmb/courses/dig2/5_Adder.pdf and I don't understand point 3 of the notes, why can we just use 4 bit CSAs even though the sum clearly will go into 5 and 6 bits? I...
Carry Save Adder Tree help
I am currently trying to implement a carry save adder tree (like a Wallace tree) in verilog but I am really confused about the addition arithmetic of carry save adder trees (I understand how a single carry save adder works). I was looking at an example on p.33 of this ducument http://www.ee.ic.ac.uk/hp/staff/dmb/courses/dig2/5_Adder.pdf and I don't understand point 3 of the notes, why can we just use 4 bit CSAs even though the sum clearly will go into 5 and 6 bits? I...
Carry Save Adder Tree help